CMOS Camera Overview
In one of my personal pursuits, I wanted to experiment with CMOS cameras. I interfaced with a few different cameras and the project below is for the camera that gave the best result. The camera was interfaced with a Spartan 3 FPGA and streamed its output to a VGA port. The camera resolution is 640 X 480 and runs at 60 frames per second.
The core of the project is controlled by the NMPSM3 soft processor that is discussed in its own project section. An I2C controller was created to configure the camera. Another control module was created to capture and buffer video data from the camera. It sends an interrupt to the processor when data is ready to be read. The video data is then stored in cellular RAM located on the FPGA development board. The cellular RAM is operated in burst mode and controlled by a dedicated control module developed for this project. There is also a VGA module that sends an interrupt to the processor when it is ready for data.