NMPSM3 Overview

After I took my first FPGA class at UCSC Extension, I was so amazed with the power these devices gave to the average person I decided to study them more in-depth.  I eventually realized I had enough logic design knowledge that I could build my own simple processor.  I started to build my own processor after learning about the KCPSM (nanoblaze) and I called it the NMPSM (Nick Mikstas Programmable State Machine).  It took three iterations before I was able to make a fully functional processor, hence the name NMPSM3.  Even though the NMPSM3 is inspired by the nanoblaze IO scheme, its internal structure is completely different.  The NMPSM3 is a 16-bit processor with four independent interrupts and a reset.  The NMPSM needs a minimum of four 18Kb BRAMS to be implemented: one for the registers, one for the stack, one for the decoder and at least 1 for the program ROM.  Once I got the processor working, I wrote an assembler for it and created a large project to show its capabilities.

When I first designed the NMPSM3, it was implemented on a Digilent Nexys 2 board.  The Nexys 2 had a Xilinx Spartan 3 part on it.  After the successful implementation of the project, I did nothing with the NMPSM3 for several years.  I eventually took a class at SCU that was basically the same class I took at UCSC Extension.  I decided to breath some life back into the NMPSM3 by updating the project to work on a Digilent Basys 3 FPGA board.  Since the new FPGA part (Artyx 7) had so much more capability than the Spartan 3, I also added some upgrades to the project.  I wrote an extensive report on the project for the class.

NMPSM3 Report


NMPSM3 Screen Captures

NMPSM3 Palette Change Demonstration

NMPSM3 Palette Change Demonstration

NMPSM3 Attribute Table Demonstration

NMPSM3 Attribute Table Demonstration

NMPSM3 Base Color Demonstration

NMPSM3 Base Color Demonstration

NMPSM3 Tiled Clock Demonstration

NMPSM3 Tiled Clock Demonstration

NMPSM3 Sprite Mirroring Demonstration

NMPSM3 Sprite Mirroring Demonstration

NMPSM3 Bouncing Sprites Demonstration

NMPSM3 Bouncing Sprites Demonstration

NMPSM3 Sprite Audio Demonstration

NMPSM3 Sprite Audio Demonstration

NMPSM3 Sprite Priority Demonstration

NMPSM3 Sprite Priority Demonstration


NMPSM3 Video Capture


NMPSM3 Hardware

Along with the processor, I built several other modules including a UART and picture processing unit (PPU) based on the 8-bit Nintendo.  Some of the Verilog code is rough because I was learning Verilog as I was creating this project.

Final_Project.v    NMPSM3.v    VGA.v    uart.v    ROMcontroller.v

MControl.v    ClockControl.v    dataMUX.v    div100k.v    FF.v

ledio.v    LEDIO2.v    seg7io.v    timer.v    timer1.v    lookupROM.coe


NMPSM3 Assembler

An assembler was also written for the NMPSM3.  It is a basic assembler but it works quite well and has been used to write code for the NMPSM3 on several FPGA projects.

NMPSM3.java


NMPSM3 Software

The first file below is the assembly language program that controls the project.  The next file is a compiled version of the assembler.  The third file is a simple batch file that runs the assembler and assembles the NMPSM3 code into a .coe file.

program.asm

NMPSM3.jar (Download)

NMPSM3.bat

program.coe